begin console

Cargo.toml

@@ -1,2 +1,5 @@
 workspace.members = ["kernel"]
 workspace.resolver = "2"
+
+profile.dev.panic = "abort"
+profile.release.panic = "abort"

README.md

@@ -1,3 +1,9 @@
-References:
+# EOS0
+
+This is mainly a port of MIT's xv6 operating system, for educational purposes.
+
+You can consider the "e" in EOS to be either educational or experimental.
+
+## References
 
 - https://lowenware.com/blog/aarch64-bare-metal-program-in-rust/

kernel/Cargo.toml

@@ -3,9 +3,6 @@ name = "kernel"
 version = "0.1.0"
 edition = "2021"
 
-profile.dev.panic = "abort"
-profile.release.panic = "abort"
-
 # [lib]
 # crate-type = ["staticlib"]
 

kernel/src/console.rs

@@ -0,0 +1,5 @@
+use crate::uart::uart_init;
+
+pub fn console_init() {
+    uart_init();
+}

kernel/src/main.rs

@@ -3,12 +3,19 @@
 
 use core::{arch::global_asm, ptr};
 
+use crate::console::console_init;
+
+mod console;
+mod memory_layout;
 mod panic;
+mod uart;
 
 global_asm!(include_str!("start.s"));
 
 #[no_mangle]
 pub extern "C" fn not_main() {
+    console_init();
+
     const UART0: *mut u8 = 0x0900_0000 as *mut u8;
     let out_str = b"AArch64 Bare Metal";
     for byte in out_str {

kernel/src/memory_layout.rs

@@ -0,0 +1 @@
+pub const UART0: u64 = 0x0900_0000;

kernel/src/uart.rs

@@ -0,0 +1,26 @@
+use crate::memory_layout::UART0;
+
+/// http://byterunner.com/16550.html
+enum Register {}
+
+impl Register {
+    fn offset(&self) -> u64 {
+        todo!()
+    }
+}
+
+/// the UART control registers are memory-mapped
+/// at address UART0. this macro returns the
+/// address of one of the registers
+#[inline]
+fn register(reg: Register) -> *mut u8 {
+    (UART0 + reg.offset()) as *mut u8
+}
+
+#[inline]
+fn read_register() {}
+
+#[inline]
+fn write_register() {}
+
+pub fn uart_init() {}